Organized by: Department of Electronics & Communication Engineering, Jain College of Engineering (JCE), Belagavi.

Event Name: 3-Days VTU Sponsored Faculty Development Program on “Advanced VLSI”

Mode of Conduct: Offline

Date: 24th to 26th October, 2024, From: 10:00 am to 5:30pm

Number of participants registered/attended: 33

Objectives of the Event:
This program aims to equip faculty members with the latest expertise in advanced VLSI, focusing on ASIC design methodologies, an introduction to VLSI design, System Verilog, and UVM. A total of 33 participants registered, including attendees from nearby states such as Maharashtra.
Resource speakers from ekLakshya include Mr. Ravi Subramanian (Partner at ekLakshya Innovation Labs), Mrs. Sheetal Koti (Senior Learning Enabler), and Mr. Ganadhar Gandudi (Design Verification Engineer).

Expected Outcomes:
Faculty members participated actively, enhancing their knowledge in ASIC design methodologies, VLSI design, System Verilog, and UVM.